- The highest performing processor for a given die size and power profile
- Robust roadmap from the vendor and the choice of architectures in the processor family that facilitate optimal programming paradigms for a given application
- Software tools, applications and SoC partner ecosystem for the processor family
- Scalability of application performance for software investment protection
- Ease of adoption on a new project or ease of migration for an upgrade to an existing project
Software investment is the biggest ticket item in any project. Hence it is important to choose an instruction set architecture (ISA) that offers a truly scalable solution for future development. To address various embedded market segments, our distinct, binary-compatible families of processor cores span applications from 32-bit microcontrollers all the way to 64-bit multi-threaded, superscalar many-core processors for networking infrastructure, and numerous digital consumer markets in between. Since one can seamlessly scale the performance range between a wide array of processors, the MIPS architecture offers an ideal path for protecting software investment on a new design or a follow-on/upgrade to an existing project.
MIPS Technologies provides the most performance efficient cores for embedded designs, with the highest performance for a given die size and power profile. MIPS’ superscalar cores are ideal for a single-threaded programming model and our multi-threaded cores facilitate both coarse grain parallelism, with virtual processing elements (VPEs) and multiple cores, to fine grain parallelism with thread contexts (TCs). A multi-threaded architecture is the most efficient way to implement applications or functions that are highly parallelizable. The MIPS64 architecture enables applications to take advantage of larger virtual address space that is greater than 4GB. An important factor to note is that MIPS32 and MIPS64 ISAs are binary compatible.
The bulk of the effort in the migration to any new ISA is in the low-level initialization software. Our new ARM architecture to MIPS and Power architecture to MIPS Migration Guides illustrate the ease of migration and highlight the areas that users need to focus on. The application code itself is typically coded in a high-level language that can be recompiled to the MIPS ISA. MIPS Technologies provides a rich portfolio of software tools that span from SoC bring-up to performance analysis tools for all popular operating systems. These robust software tools enable the user to optimize their application with very little effort. Several third party software tool vendors offer a variety of development kits with popular operating systems and a rich suite of tools that make migration straightforward.
The breadth and the rich features of MIPS Technologies’ product portfolio, coupled with a flexible business model, enable MIPS licensees to create MIPS-Based products that range from 32-bit microcontrollers and energy efficient mobile devices to ‘green’ supercomputers and high-end networking infrastructure products.
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